Low voltage clamp
US4689651A · kind A · utility
9Cited by
3References
2Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 29, 1985 |
| Grant date | Aug 25, 1987 |
| Priority date | — |
| Expiry date | Jul 29, 2005 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/60
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A low voltage clamp circuit comprises a transistor and semiconductor junction impedance circuitry for establishing an impedance such that the magnitude of a voltage applied across the emitter and collector of the transistor is clamped at a value that is less than the reverse breakdown voltage of the collector-to-emitter of the transistor if its base is shorted to the collector. The clamp circuit is suited to be manufactured in monolithic integrated circuit form and can be used to protect integrated bipolar transistors from having the reverse breakdown voltage of their emitter-base junctions exceeded.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.