Optical floating-point matrix-vector multiplier
US4692885A · kind A · utility
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8References
15Claims
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Key dates
| Filing date | Dec 27, 1985 |
| Grant date | Sep 8, 1987 |
| Priority date | — |
| Expiry date | Dec 27, 2005 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06E3/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A digital multiplication by analog convolusion algorithm is extended by a brid combination of both floating and fixed-point arithmetic. An acousto-optical time-integrating architecture uses a binary representation of the hybrid combination of floating and fixed-point arithmetic. An array of full adders in conjunction with a photodetector array avoids generating mixed binary outputs that normally result when the digital multiplication by analog convolution algorithm is applied so as to eliminate the need for analog-to-digital converters otherwise needed to convert mixed binary to pure binary.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.