Simulation apparatus and method
US4694411A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Feb 4, 1985 |
| Grant date | Sep 15, 1987 |
| Priority date | — |
| Expiry date | Feb 4, 2005 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2111/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for simulating a network comprising a plurality of processing elements useful in simulating, for example, complex digital combinatorial electronic logic circuits. Each type of digital logic element is assigned a symbol, and the symbols are stored in an array pattern in a memory, with the row and column addresses of the symbols in memory corresponding to their position in the network. The simulator sequentially retrieves each element in the network starting from an input and determines the element response to an input signal based on the type of element and the signals input to it. After all of the elements in the network have been processed, the simulated output of the network is available at the network output elements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.