Digital delay interpolation filter with amplitude and phase compensation
US4694414A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 19, 1984 |
| Grant date | Sep 15, 1987 |
| Priority date | — |
| Expiry date | Dec 19, 2004 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H17/06
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A digital input signal to be delayed is applied to a two-point linear interpolation filter which imparts delay to the signal proportional to the value of a delay control signal. Errors in both the amplitude and the phase of the delayed signal are minimized by the addition of a correction signal to the delayed signal. The correction signal is provided by applying the input signal to a further filter and a multiplier connected in cascade. The further filter is a linear phase filter having a response zero at zero frequency and a delay equal to an add multiple of one-half of the sampling period, Ts, of the digital input signal. The multiplier is controlled so as to vary the amplitude of the compensating signal as a non-linear function of the delay control signal so as to provide maximum amplitude compensation at delays corresponding to odd multiples of Ts/2 and zero amplitude compensation at delays equal to integer multiples of Ts.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.