High density micropackage for IC chips
US4695872A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Aug 1, 1986 |
| Grant date | Sep 22, 1987 |
| Priority date | — |
| Expiry date | Aug 1, 2006 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A micropackage for providing high density, three dimensional packaging of integrated circuit chips. A chipmount (10) includes a plurality of channels (36) on the bottom surface thereof for holding a corresponding plurality of integrated circuit chips (16). A shallow cavity (34) is formed on the top surface of the chipmount (10) for holding another integrated circuit (14). Metallization interconnections (22) are formed on the top and bottom surfaces of the chipmount (10) and are terminated by solder pads (24, 39). Conductive conduits (26) are formed through the chipmount (10) for providing electrical continuity between an integrated circuit chip (14) mounted on the top side, to other integrated circuit chips (16) mounted on the bottom side of the chipmount. Other conductive conduits (30, 32) and a bridging member (28) insulates intersecting conductive paths (48, 50). The micropackage is fabricated with standard silicon technology.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.