Adder circuit for encoded PCM samples
US4698771A · kind A · utility
3Cited by
3References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 31, 1984 |
| Grant date | Oct 6, 1987 |
| Priority date | — |
| Expiry date | Dec 31, 2004 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/49936
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit adds and subtracts pulse code modulation (PCM) samples in D2 format. An exponent subtractor determines the difference between exponents of the two PCM samples. A mantissa shifter circuit shifts the mantissa portion of a selected PCM sample to compensate for the difference in the exponents. A mantissa adder circuit adds or subtracts the mantissa portion of the shifted and unshifted PCM samples and a sign generator provides a sign value representative of the resultant added or subtracted PCM samples. A normalizer circuit ensures that the mantissa has a predetermined range of values.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.