Integrated circuit for the emission of a voltage which alternates between positive and negative voltage levels

US4701634A · kind A · utility

Assignee

• Siemens Aktiengesellschaft · DE

Inventors

• Alfred Schuetz · Fulda, DE
• Wolfgang Muller · Königsfeld, DE
• Ewald Soutschek · Haar, DE

Key dates

• Filing date: Jul 1, 1985
• Grant date: Oct 20, 1987
• Expiry date: Jul 1, 2005

Classification

• Technology area (CPC H): Electricity
• CPC primary: H03K3/3565
• WIPO field: Basic communication processes
• WIPO sector: Electrical engineering

Abstract

An integrated circuit for emitting a clock voltage V.sub.A which alternates between positive and negative voltage levels with the clock voltage being controllable by means of a unipolar clock voltage V.sub.E and wherein the circuit is a very simple small semiconductor arrangement which has three series connected field effect transistors T1, T2 and T3 with the first end of the series arrangement receiving a first reference voltage and the other end of the series arrangement receiving a second reference voltage. The first and second field effect transistors 1 and 2 or first and second channel types and have gate terminals which are commonly connected to the control input V.sub.E and the junction point 3 of the first two field effect transistors T1 and T2 connected to the output terminal and also connected by way of a capacitor to the gate of the third field effect transistor T3 which is of the first channel type. The gate of the third field effect transistor T3 is connected by way of a diode D or an additional field effect transistor T4 of the first channel type which has its gate connected to the second reference voltage potential.