BICMOS binary logic circuits
US4701642A · kind A · utility
34Cited by
8References
16Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Apr 28, 1986 |
| Grant date | Oct 20, 1987 |
| Priority date | — |
| Expiry date | Apr 28, 2006 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/09448
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A BICMOS binary logic circuit or system is provided which includes P-channel and N-channel transistors, a bipolar transistor having a base connected to the drain of the P-channel transistor, a diode, preferably a Schottky barrier diode, connected between the emitter of the bipolar transistors and the drain of the N-channel transistor, a capacitor load connected to the emitter of the bipolar transistor and an input terminal connected to control electrodes of the P-channel and N-channel transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.