Static semiconductor memory device
US4701889A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 23, 1985 |
| Grant date | Oct 20, 1987 |
| Priority date | — |
| Expiry date | May 23, 2005 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A static semiconductor memory device includes a memory cell matrix having word and digit lines connected to memory cells, an X address decoder connected to the word lines, a gate circuit connected to the digit lines, a Y address decoder connected to a gate of the gate circuit, a sense amplifier connected to an output of the gate circuit, a latching circuit connected to an output of the sense amplifier, and an internal control circuit for supplying control signals to the above components. The internal control circuit controls so as to activate the X address decoder and the sense amplifier, precharge the latching circuit, supply a select signal representing an updated address to the selected word and digit lines, cause the latching circuit to latch a signal appearing across the digit line, and deactivate the X address decoder and the sense amplifier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.