Dot matrix display panel with a thin film transistor and method of manufacturing same
US4704002A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 29, 1986 |
| Grant date | Nov 3, 1987 |
| Priority date | — |
| Expiry date | Dec 29, 2006 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S359/90
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A dot matrix display panel with a thin film transistor and the manufacturing method therefor, the panel being so constructed that a gate insulating layer and a semiconductor layer are provided as one laminated film substantially equal in the size thereto on an insulating substrate having a gate electrode and in a region of the substrate except for the peripheral portion thereof, and a source electrode and a drain electrode come into contact with the semiconductor layer in a region covering the gate electrode and gate insulating layer so as to constitute a thin film transistor array substrate, so that a display medium is sandwiched between the array substrate and the substrate having a transparent electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.