Multifunction floating FET circuit
US4705967A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 31, 1985 |
| Grant date | Nov 10, 1987 |
| Priority date | — |
| Expiry date | Oct 31, 2005 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F3/265
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A transistor circuit is provided with a symmetrical floating configuration for attaining multifunction operation of a transistor having symmetrical source and drain characteristics, preferably a GaAs MESFET. The circuit includes a balun which may be configured as a transformer, a differential amplifier, or a magic-tee waveguide depending on the frequency of signals to be processed by the circuit. Balanced terminals of the balun may be directly or capacitively coupled to source and drain terminals of the transistor. Tuning circuits are employed for applying signals having different frequencies to the transistor and for extracting intermodulation products generated by the transistor in response to the signals at the different frequencies. With the direct connection between the balun and the transistor, alternating voltages may be impressed between the terminals of the transistor to alternate source and drain regions of the transistor. Functions of amplification, modulation, bipolar attenuation, four-quadrant multiplication and correlation, power frequency tripling, and mixing are obtainable. The transistor may be replaced with a pair of transistors connected in series or in antiparal…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.