Darlington type switching stage for a line decoder of a memory
US4706222A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 15, 1986 |
| Grant date | Nov 10, 1987 |
| Priority date | — |
| Expiry date | Apr 15, 2006 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A switching stage receives two levels at its input, i.e. a high selection level and a low non-selection level. The Darlington stage (T.sub.1, T.sub.2) supplies at its output (E) a high current in the selected mode and a considerably smaller current in the non-selected mode. In order to accelerate the evacuation of charges accumulated in the base of T.sub.2 and hence the deselection time of the stage, an auxiliary current source (I), is connected to a point A. Between the base (B) of the transistor T.sub.2 and the point A two diodes (D.sub.1, D.sub.2) are connected in series in the forward direction. Between the emitter (E) of T.sub.2 and the point A a diode (D.sub.3) is connected in the forward direction. In the selected mode, the major part of the current I passes through D.sub.1, D.sub.2 and this current permits the evacuation of the charges from the base of the transistor T.sub.2 when the stage is deselected.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.