Video processing systems
US4709393A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 16, 1983 |
| Grant date | Nov 24, 1987 |
| Priority date | — |
| Expiry date | Mar 16, 2003 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N5/222
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A processing system includes a processor 10 and frame store 11. Both the frame store and processor are under the control of address mechanism 12. An incoming pixel is processed with previously stored information and the proportion of processed information restored is controlled to prevent errors in picture information density as store location may be accessed a number of times in a frame period. The addressing mechanism 12 can generate the desired information from address information which is only provided on some of the store locations and which is only updated over more than one frame period. The mechanism includes spatial and temporal interpolators to effect this operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.