Method and apparatus for minimizing errors in the digital processing of electrical signals
US4709395A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 17, 1984 |
| Grant date | Nov 24, 1987 |
| Priority date | — |
| Expiry date | Jul 17, 2004 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N1/4057
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for minimizing errors in digital processing of electrical signals whereby a digital input signal is divided into a digital useful signal having a lower resolution than the input signal and into a digital error signal having lower resolution than the input signal. A deviation of the useful signal is reproduced from the input signal and a check is performed to see whether the sum error of a plurality of successive useful signal values crosses a prescribed upper or lower threshold. When a threshold is crossed, an error value of the useful signal which comes closest to this threshold is identified and the useful signal and the error signal of this signal value are corrected such that the sum error no longer crosses the threshold.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.