Data transmitting and receiving apparatus
US4710871A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 1, 1982 |
| Grant date | Dec 1, 1987 |
| Priority date | — |
| Expiry date | Nov 1, 2002 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2001/0093
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A system for controlling the transfer of a data message over a common communication channel between a plurality of processing devices includes a MOS/LSI controller chip associated with each processing unit for constructing a message to be sent to a sending device acknowledging the receipt of the message and the validity of the message. Logic circuits are included which generate a predetermined sequence of two binary bits indicating the receipt of the message and the validity of the receiving message. The binary bits are framed by two other binary bits and the sequence repeated a predetermined number of times to construct an acknowledgment message. The controller chip further includes logic circuits for decoding the acknowledgment message.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.