Clock recovery and retiming scheme with saw filter phase trimming to achieve desired system phase adjustment
US4715049A · kind A · utility
8Cited by
6References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 12, 1986 |
| Grant date | Dec 22, 1987 |
| Priority date | — |
| Expiry date | Mar 12, 2006 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/027
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A clock recovery and data retiming circuit is disclosed which utilizes a SAW filter to form the recovered clock signal. The phase shift of the received data signal associated with various attenuation and distortion effects of the communication channel is compensated for and removed from the retimed data signal by adjusting the phase of the SAW filter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.