Display refresh memory apparatus utilizing one half frame updating
US4716460A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 8, 1986 |
| Grant date | Dec 29, 1987 |
| Priority date | — |
| Expiry date | Oct 8, 2006 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T1/60
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Refresh memory apparatus for use in a CRT raster display system utilizes half field storage memories for ping ponging between updating and readout. In one TV mode of operation the even and odd raster lines are stored in the respective memories and in another TV mode the top and bottom halves of the frame are stored therein. The most significant bit and least significant bit of the vertical address signals are multiplexed to control the ping pong reading and writing of the memories and are multiplexed with the remainder of the address signal to provide the read and write addresses for the memories. The multiplexers are controlled in accordance with the TV mode in which the system is operating.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.