Power down sense circuit
US4716463A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 24, 1986 |
| Grant date | Dec 29, 1987 |
| Priority date | — |
| Expiry date | Oct 24, 2006 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02B70/10
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A low voltage sense circuit for a microprocessor controlled television receiver includes a 5 volt regulator having a large electrolytic capacitor coupled across its output, which is the power input terminal of a microprocessor. The microprocessor includes a sleep terminal for initiating operation in a minimum power consumption mode. The 12 volt input to the 5 volt regulator is coupled to the bias circuit of a PNP transistor that includes a Zener diode and which is in saturation as long as the input voltage to the 5 volt regulator is greater than the breakdown voltage of the Zener diode. The collector output of the transistor is connected to the sleep terminal of the microprocessor. When the transistor is driven out of saturation, an appropriate voltage change is developed at the sleep terminal for causing the microprocessor to switch to its low power sleep mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.