Multiplier circuit for encoder PCM samples
US4716539A · kind A · utility
1Cited by
5References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 31, 1984 |
| Grant date | Dec 29, 1987 |
| Priority date | — |
| Expiry date | Dec 31, 2004 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/49936
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit multiplies pulse code modulation (PCM) samples in D2 format. An exponent adder provides the sum of the exponents of the two numbers. A mantissa multiplier circuit determines the product of the two mantissas and a sign generator provides a sign value for the resultant product of the two numbers. A normalizer circuit ensures that the product mantissa has a predetermined range of values.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.