CMOS input level shifting circuit with temperature-compensating n-channel field effect transistor structure
US4717836A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Feb 4, 1986 |
| Grant date | Jan 5, 1988 |
| Priority date | — |
| Expiry date | Feb 4, 2006 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A CMOS input level shifting circuit includes a temperature-compensating N-channel field effect transistor structure wherein a resistance in series with the source region includes an extension of a lightly doped P-type region in which the source and drain regions are diffused. This structure produces a temperature-compensating variation in the drain current proportional to the square of the series resistance without requiring modification of standard processes for manufacturing CMOS integrated circuits. The relatively large, temperature-dependent variation of the series resistance produces a corresponding temperature-dependent variation in the drain current that effectively temperature-compensates the switching point of the CMOS input level shifting circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.