Cache storage priority
US4722046A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 17, 1986 |
| Grant date | Jan 26, 1988 |
| Priority date | — |
| Expiry date | Oct 17, 2006 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0804
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing machine includes an instruction unit that decodes and organizes a flow of instructions for processing data. In response to certain instructions, the instruction unit generates requests for storage unit resources. In addition, results generated in the instruction unit in response to certain instructions are supplied for storage in the storage unit. The storage unit selects in response to priority logic from completing requests for storage unit resources, including a high speed cache storing data, and a plurality of storage ports for transferring data from the result register to the high speed cache. Each of the storage ports generates requests for access to the high speed cache to transfer the data stored in the respective store ports to the cache. Storage unit priority is determined in part by predicting the fullness of the storage ports.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.