Patent · US Expired

Conversion circuit of a differential input in CMOS logic levels

US4724343A · kind A · utility

20Cited by
1References
2Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 17, 1986
Grant dateFeb 9, 1988
Priority date
Expiry dateSep 17, 2006

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K19/09448
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

The present invention relates to a conversion circuit having a differential input in CMOS logic levels, this circuit comprising an input comparator comprising two NPN type bipolar transistors, connected by their emitters and receiving differential input signals on their bases; a CMOS flip-flop comprising two branches each constituted by a P-channel MOS transistor in series, with two N-channel MOS transistors of each branch being connected in order to set the current of these branches at the passing state, the gates of the first N-channel MOS transistors of each branch being connected to the drains of the P-channel transistors of the other branch and to an output terminal. This circuit can be used in plasma panel command operations.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.