Emitter coupled logic circuit having fuse programmable latch/register bypass
US4725979A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 5, 1986 |
| Grant date | Feb 16, 1988 |
| Priority date | — |
| Expiry date | Dec 5, 2006 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/2885
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An emitter coupled logic circuit includes a bypass circuit which provides a conductive path for current when a programmable fuse is blown, so that input data is transmitted independently of the state of a clock signal. In one implementation, the circuit takes a register configuration having a master section and a slave section, each incorporating a programmable fuse. When the fuse in just one section is intact, the circuit serves as a clocked latch. When both fuses are blown, the bypass circuit is enabled so that the register functions as a combinatorial circuit which produces an output signal dependent on the input signal without reference to a clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.