Fault-tolerant voted output system
US4726026A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 8, 1985 |
| Grant date | Feb 16, 1988 |
| Priority date | — |
| Expiry date | Feb 8, 2005 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/23
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A majority-voted output circuit generates an output parameter which is the majority vote of its input parameters by series-parallel combination of four intermediate switches, each said switch being a Boolean function of the input parameters, and the circuit being arranged so that failure of any one switch does not affect the value of the output parameter. Alternate embodiments are provided which use "don't care" signals to allow the majority vote of less than the full complement of input parameters. The majority-voted output circuit is subjected to testing by stepped transitions of its input parameters (to test for failure of any of the four intermediate switches) and by forcing current flow through predetermined current paths (to test for failure of a particular electrical connection).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.