Digital television receiver with memory refreshing circuitry
US4727426A · kind A · utility
5Cited by
3References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 4, 1985 |
| Grant date | Feb 23, 1988 |
| Priority date | — |
| Expiry date | Oct 4, 2005 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N9/64
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Method and apparatus for use with a television receiver wherein a television signal is processed in a digital form and which includes a memory for storing data to control such processing, in which a circuit is provided for refreshing the data in the memory at successive vertical blanking periods and a circuit is also provided for writing input data into the memory at the appropriate location at any time new data is desired to be input by the user. An operating method is also provided to accomplish the functional tasks of the refreshing circuit and interrupt circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.