Patent · US Expired

Fabricating a field effect transistor utilizing a dummy gate

US4728621A · kind A · utility

20Cited by
12References
17Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 24, 1986
Grant dateMar 1, 1988
Priority date
Expiry dateNov 24, 2006

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D64/017

Abstract

A process for the fabrication of "low temperature"-gate MESFET structures, i.e., gate metal deposition takes place after annealing of an n.sup.+ -implant that form source- and drain- contact regions. The process permits self-alignment of all three important MESFET parts, namely, the implanted contact regions, and both, the ohmic, as well as the gate, contact metallizations. In the process, a multi-layer "inverted-T" structure is used as a mask for the n.sup.+ -implant and for the ohmic and gate metallizations. The upper part of the "inverted-T" is a so-called dummy gate which is replaced by the Schottky gate after ohmic contact metal deposition. The source-gate and drain-gate separations are determined by the shoulders of the lower layer of the "inverted-T", the shoulders being obtained using sidewall techniques.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.