Patent · US Expired

Circuit for driving a capacitive load which provides low current consumption

US4730123A · kind A · utility

2Cited by

3References

6Claims

0Family size

Assignee

U.S. Philips Corporation · US

Inventors

Fritz Wegener · Stockdorf, DE
Manfred Albach · Aachen, DE

Key dates

Filing date	Oct 29, 1986
Grant date	Mar 8, 1988
Priority date	—
Expiry date	Oct 29, 2006

Classification

Technology area (CPC H)Electricity
CPC primaryH03K17/6877
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

A circuit arrangement for driving a capcitive load comprises a control circuit (1), whose output is the collector of an output transistor (2). The collector is coupled through the gatesource path of a junction field effect transistor (5) and a resistor (6) connected parallel thereto to the capacitive load (8). The drain connection of the J-FET is connected to the supply voltage (Ub). The circuit permits rapid switching of the load while maintaining the current consumption relatively low.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.