Interswitch line circuit
US4731827A · kind A · utility
7Cited by
15References
8Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 29, 1984 |
| Grant date | Mar 15, 1988 |
| Priority date | — |
| Expiry date | Oct 29, 2004 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04M19/026
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A tip-ring interface that utilizes a single detector to detect ringing, forward loop current, and reverse loop current. In one embodiment, forward or reverse battery state may be detected when on-hook.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.