Circuit testing method and apparatus
US4733174A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 10, 1986 |
| Grant date | Mar 22, 1988 |
| Priority date | — |
| Expiry date | Mar 10, 2006 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/306
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A testing method and apparatus employs electron beam writing and reading of conductive paths in a circuit device rather than physical probing of conductive elements. Portions of the circuit device, e.g., conductive paths, are bistably stored at a given potential and then the device is read by a reading beam to determine if proper connections exist. Read out is at comparatively high levels represented by the difference between bistable voltage values. Once a portion of the device has been tested, it may remain in stored condition such that additional cross checking or repetition of testing is rendered unnecessary.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.