Semiconductor device with input and/or output protective circuit
US4733285A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 24, 1985 |
| Grant date | Mar 22, 1988 |
| Priority date | — |
| Expiry date | Jul 24, 2005 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/601
Abstract
An MOSIC is provided with an input and/or output protective circuit which includes a first semiconductor region formed in a semiconductor substrate with a PN junction and electrically coupled between an input or output terminal and a transistor to be protected and a second semiconductor region formed so as to surround the first region. The PN junction formed between the second region and the substrate is reverse-biased, whereby the second region absorbs carriers which are undesirably injected from the first region into the substrate in an electrical operation of the IC.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.