Data processing apparatus for controlling reading out of operands from two buffer storages
US4733344A · kind A · utility
11Cited by
2References
3Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 24, 1985 |
| Grant date | Mar 22, 1988 |
| Priority date | — |
| Expiry date | Dec 24, 2005 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3824
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The data processing apparatus has first and second storages each independently accessible. An instruction unit applies a fetch request on a one-operand instruction to the first storage, and a fetch request on a two-operand instruction to the first and second storages. In case of a fetch request on a two-operand instruction, a storage control unit instructs the instruction unit to produce again a fetch request if one of the first and second storages is busy, and execute reading the operands in the order of decoding of instructions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.