Apparatus and method for signal processing
US4733404A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 25, 1986 |
| Grant date | Mar 22, 1988 |
| Priority date | — |
| Expiry date | Nov 25, 2006 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/033
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A transmission control circuit for use in a data terminal equipment receiver section is disclosed. The output of a phase locked loop or narrow band tuned filter input register clocking circuit which includes a quasi-differentiator and full wave rectifier is sent to a divider circuit and the divided clocking signal is then quasi-differentiated, full-wave rectified and used to drive a signal source circuit. The signal source circuit output has a polarity which is determined by the signal output of the full wave rectifier and is integrated and fed back to control inputs of the quasi-differentiators. An offset signal is also provided to the integrator. The result is an automatic adjustment of the pulse width to a fixed fraction of the input bit period.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.