Method of stacking printed circuit boards
US4733461A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Aug 18, 1986 |
| Grant date | Mar 29, 1988 |
| Priority date | — |
| Expiry date | Aug 18, 2006 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49126
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method for stacking, on a mother board in high density, N printed circuit boards which are formed, respectively, in the same size and shape of a regular N-sided polygon, where N is an integer not less than three. The mother board is provided, at a position corresponding to one side of the regular N-sided polygon, with a first connector, and is provided, at 360/N-degree intervals around the center point of the regular N-sided polygon, with N second connectors for selecting the printed circuit boards. Terminals of a data bus line, and address bus line, and a timing signal line for reading/writing data are arranged in the first connector. Each of the N printed circuit boards is provided, on one face thereof at one side of the regular N-sided polygon, with a third connector, is provided, on the opposite face thereof at an adjacent side to the side having the third connector, with a fourth connector, and further is provided, on both faces thereof penetrating therethrough at positions confronting the N second connectors of the mother board, with N fifth connectors for coupling to the second connectors. Each of the terminals of the fourth connector is connected correspondingly to each o…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.