Method and device for detecting a particular bit pattern in a serial train of bits
US4734676A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 17, 1985 |
| Grant date | Mar 29, 1988 |
| Priority date | — |
| Expiry date | May 17, 2005 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/042
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Memory 60 contains a decision table which is a replica of the particular N-bit pattern to be detected. When a bit is received over line 12, a table lookup operation is performed to determine whether the entry at the address indicated by address counter 34 contains a bit that matches the received bit. If so, the content of the address counter is incremented by one and the device waits for another bit to be received over line 12. If the bit in the entry does not match the received bit, then, if the address indicated by the counter is zero, the count of the counter is maintained at zero and the device waits for another bit to be received; or, if the address is different from zero, the counter is reset to zero and the bit present on line 12 is again presented to the table in order, this time, to be compared with the bit in the entry at address zero. The pattern is detected when the address contained in the counter is equal to N and when the last bit in the pattern matches the bit with which it is compared.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.