Data processing device
US4736288A · kind A · utility
60Cited by
12References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 18, 1984 |
| Grant date | Apr 5, 1988 |
| Priority date | — |
| Expiry date | Dec 18, 2004 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/8092
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing device which is equipped with a plurality of arithmetic units so that a plurality of instructions may be processed in parallel by the plural arithmetic units. The device includes a register control circuit for assigning one of a plurality of physical registers to store instructions when more than one of the instructions requires the use of the same logical register. This correspondence between the physical and logical registers is maintained while instructions are subsequently transferred to the arithmetic units where they are processed in parallel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.