Self-checking error correcting encoder/decoder
US4736376A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 25, 1985 |
| Grant date | Apr 5, 1988 |
| Priority date | — |
| Expiry date | Oct 25, 2005 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/19
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Encoding/decoding circuitry which processes data and both corrects single errors and detects multiple errors is disclosed. The circuitry is both fail-safe and self-checking in that no internal device failure can alter data without producing improperly encoded outputs and all failures quickly reveal themselves through normal usage even if they do not actually cause any data to be modified. The circuitry can be configured in two identical halves with each half operating on one half of the data so that the circuitry can be advantageously constructed with large scale integrated circuits. Error-detecting information in the form of a syndrome produced by each circuit half is combined with similar syndrome information produced by the other circuit half. The combined syndrome information is then decoded to generate error correction information which is used to modify the data bit outputs to correct detected errors. A failure in either circuit half modifies the combined syndrome information in such a way that the modification can either be detected or else causes no erroneous data bit modification.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.