Method for making multilayer circuits using embedded catalyst receptors
US4737446A · kind A · utility
34Cited by
18References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 30, 1986 |
| Grant date | Apr 12, 1988 |
| Priority date | — |
| Expiry date | Dec 30, 2006 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/0525
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The invention is directed to a laminate for the preparation of a multilayer printed circuit by electroless plating of conductive metal thereon which comprises PA0 a. a substrate having formed on a surface thereof PA0 b. a conductive pattern, and, PA0 c. overlying the pattern and surrounding substrate areas, a layer of tonable photodielectric material having partially embedded therein finely divided particles of adsorbent which protrude from the layer surface away from the substrate, the protrusive surfaces of which are adsorptive with respect to electroless plating catalysts or reductive precursors thereof.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.