Patent · US Expired

Logic gates realized in differential cascode ECL technology

US4737664A · kind A · utility

6Cited by
5References
11Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 24, 1985
Grant dateApr 12, 1988
Priority date
Expiry dateSep 24, 2005

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K19/0866
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A semiconductor circuit arrangement in ECL technology for realizing logic conjunctions between more than three input variables includes at least two series-gating stages having at least two ECL current switches controlled by an input variable each and each includes a reference circuit and at least one control circuit, forming logical conjunctions if connected in series and at least one diode for separating the conjunctions from each other by at least one diode threshold voltage, further including a push-pull differential amplifier forming the control circuit of each ECL current switch for forming a logical conjunction between input signals of the push-pull differential amplifier and at least one signal depending on an input variable of another voltage level.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.