Buffer memory control system
US4737908A · kind A · utility
5Cited by
1References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 27, 1986 |
| Grant date | Apr 12, 1988 |
| Priority date | — |
| Expiry date | Mar 27, 2006 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0859
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A buffer memory control system for executing an immediate instruction, including a block fetch control unit for generating a first move-in complete signal indicating that the move-in of the heading subblock from a main memory to the buffer memory is completed. In response to the first move-in complete signal, the fetch and store operation starts without waiting for the completion of the move-in of a full block.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.