Depletion-mode FET for the regulation of the on-chip generated substrate bias voltage
US4739191A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 27, 1981 |
| Grant date | Apr 19, 1988 |
| Priority date | — |
| Expiry date | Apr 27, 2001 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F3/205
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
An on-chip regulated substrate bias voltage generator for an MOS integrated circuit includes a ring oscillator (10) for developing a true signal and its complement. The signals are applied to a charge pump (12) that includes two capacitors (C1 and C2) and a plurality of rectifiers (22, 24, and 26). The charge pump produces a substrate bias voltage (V.sub.BB) which is supplied to the gate of a depletion-mode field-effect transistor (28) whose source receives a reference voltage (V.sub.SS). The transistor forms part of a control circuit (14) coupled to the ring oscillator. In the N-channel case, the charge pumping action on the substrate drives the substrate bias negative until it reaches the sum of the reference voltage and threshold voltage of the depletion-mode transistor. This enables the control circuit to control the operation of the ring oscillator so as to regulate the substrate bias voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.