Address generator
US4740914A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 31, 1984 |
| Grant date | Apr 26, 1988 |
| Priority date | — |
| Expiry date | Dec 31, 2004 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An address generator which provides addresses for machine storage and software retrieval of computer status information. A counter is used to generate address signals in a descending order until it is disabled by a computer during alarm conditions. Under such conditions the counter provides a bias address for referencing the most recent status word. A gating circuit gates computer generated address signals to an adder circuit during the alarm conditions. The adder circuit adds the computer generated address signals to the counter generated bias signal to provide address signals which reference physical storage locations in a memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.