Computational method and apparatus for finite field multiplication
US4745568A · kind A · utility
28Cited by
3References
27Claims
0Family size
Inventors
Key dates
| Filing date | May 30, 1985 |
| Grant date | May 17, 1988 |
| Priority date | — |
| Expiry date | May 30, 2005 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/724
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A multiplier for obtaining the product of two elements in the field GF(2.sup.m) utilises the normal basis representation of each element. The product is also represented in normal basis form with each binary digit of the bit vector being determined by a sum of the product of the binary digits representing the two elements. By grouping like ones of one of the binary digits in the expression for the binary digit of the product and offsetting the suffixes of the binary digits, it is possible to accumulate grouped terms of each of the binary digits of the product simultaneously.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.