Programmable clock generator
US4745573A · kind A · utility
17Cited by
3References
1Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Apr 11, 1986 |
| Grant date | May 17, 1988 |
| Priority date | — |
| Expiry date | Apr 11, 2006 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A programmable clock generator includes programmable logic arrays implementing a shift register and control circuits elements connected between the inputs and outputs of the shift register elements and responsive to a code applied thereto for skipping preselected shift register elements during shifting. At least one JK flip-flop is receptive of timing signals from non-skipped shift register elements at the J and K inputs thereof to produce a clock signal at the output thereof.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.