Patent · US Expired

Method for making an LDD MOSFET with a shifted buried layer and a blocking region

US4746624A · kind A · utility

28Cited by
4References
9Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 31, 1986
Grant dateMay 24, 1988
Priority date
Expiry dateOct 31, 2006

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY10S438/965
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A MOSFET structure characterized by a lightly doped tip region located between the channel and drain, and a buried region located below the tip region and shifted laterally towards the drain. The buried region, which is doped to a level intermediate between that of the tip region and the drain, causes the channel current to deflect downwardly from the field oxide, through the lightly doped tip region, and into the buried region. The gradual electric field gradient produced by the structure and the deflection of the channel current away from the thin oxide greatly reduces the device's sensitivity to the hot electron effect. The method of the invention includes forming the lightly doped tip region, forming a first oxide spacer, forming the buried region, widening the oxide spacer, and finally forming the drain region.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.