BIFET logic circuit
US4746817A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 16, 1987 |
| Grant date | May 24, 1988 |
| Priority date | — |
| Expiry date | Mar 16, 2007 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/09448
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A BIFET logic circuit for quickly switching an output line from a high level to a reference level. The BICMOS circuit comprises a push-pull circuit including a first bipolar transistor for driving current into an output line, and a second bipolar transistor for sinking current from the output line; a CFET logic circuit for performing a logic function and including at least one N type FET for providing current to the base of the second bipolar transistor when a set of input lines to the CFET circuit has a first set of predetermined values; and a resistive means for connecting one of the source or drain of the at least one NFET to a power supply to provide a source of base current to the second bipolar transistor, even when the output line drops in voltage. This circuit is especially advantageous for driving low threshold CFET circuits. In a preferred embodiment, the circuit further includes a device for preventing a voltage differential of more than a predetermined amount between the base and emitter of the first bipolar transistor, to thereby ensure proper push-pull operation of the bipolar transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.