Parallel algorithmic digital to analog converter
US4746903A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 17, 1986 |
| Grant date | May 24, 1988 |
| Priority date | — |
| Expiry date | Dec 17, 2006 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/667
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A digital to analog converter for converting an N-bit digital word into its analog representation including means for splitting the N bits into n sections of N/n bits each. For instance a 12-bit word is split into an odd section and an even section which are processed independently and in parallel. This results in two partial results, V.sub.i and V.sub.p, respectively, representative of the odd and even bit sections. The last step of the conversion is the action of the two partial results V.sub.i and V.sub.p to provide the analog representation of the 12-bit word. Few operators are required to process each section because each bit is converted sequentially. This provides a low cost, compact and simple converter, moreover, since few operators are required, it may be advantageous to use high precision operators as disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.