IC card
US4748320A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 27, 1986 |
| Grant date | May 31, 1988 |
| Priority date | — |
| Expiry date | Oct 27, 2006 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1068
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In an IC (integrated circuit) card, a CPU (central processing unit) is connected to a data bus and an address bus. A data memory is connected to the data bus and the address bus. The data memory is a rewritable memory, such as EEPROM (electrically erasable programmable read only memory) or battery backed-up RAM (random access memory). The data memory is segmented into a predetermined number of sectors each consisting of predetermined bytes. An external processing device, such as a terminal device is connected to the data bus and the address bus, via a one-bit I/O line and a port. The terminal device supplies a processing instruction via the I/O line to the third port. The CPU receives the processing instruction via the data bus, analyzes the instruction, and reads out and executes the necessary program. The CPU supplies the results of each processing to the terminal device, by way of the data bus, the port and the I/O bus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.