Viterbi decoder with reduced number of data move operations
US4748626A · kind A · utility
61Cited by
9References
22Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 28, 1987 |
| Grant date | May 31, 1988 |
| Priority date | — |
| Expiry date | Jan 28, 2007 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/3438
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Disclosed is a modem including a transmitter having a convolutional encoder for transforming each time unit digital data into an expanded bit sequence having symbol-selecting bits and subset-selecting bits, the transmitter further providing modulation of a carrier signal and a receiver wherein a Viterbi decoder determines the maximum likelihood path through a trellis from a plurality of surviving paths using a wraparound memory wherein in each addressable location indexed to a current state of a surviving path there is stored a previous state of that surviving path.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.