Phase-locked data detector
US4750193A · kind A · utility
16Cited by
11References
5Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Apr 20, 1987 |
| Grant date | Jun 7, 1988 |
| Priority date | — |
| Expiry date | Apr 20, 2007 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/0891
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The data detector for extracting clock information from an encoded run length limited data signal, including a control loop comprised of a phase detector, the charge pump, a filter buffer circuit and a voltage-controlled oscillator, wherein the data detector embodies a monostable multivibrator having a Q2 output that changes from low to high state at one-half the duration of the Q1 output, so that the Q2 output lags Q1 by 90 degrees and appears in phase with the extracted clock signal when the loop is locked.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.