Externally programmable, process and temperature insensitive threshold receiver circuit
US4751405A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 26, 1985 |
| Grant date | Jun 14, 1988 |
| Priority date | — |
| Expiry date | Aug 26, 2005 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/3565
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A threshold receiver circuit consists of a reference subcircuit and one or more signal input subcircuits. The reference subcircuit derives a mirror voltage by regulating a reference current flowing through an external reference resistor. The mirror voltage is distributed to each of the signal input subcircuits. Within each signal input subcircuit a signal transistor has its gate connected to the mirror voltage and its drain connected to a common input node, thereby causing a signal current to flow into the common input node which is proportional to the reference current. The signal current also flows through an external signal input resistor which is connected to the input node, and into the external input signal source. The input node voltage is thus equal to the input signal source voltage plus the voltage-drop across the signal input resistor. This input node voltage is compared to an internal reference voltage by a comparator which is also connected to the common input node. Thus, a logic output signal is produced by the comparator corresponding to the magnitude of the input signal source. Hysteresis is added at the comparator reference input, and also by means of one or more h…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.